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DDR Fiches technique, PDF

Mot-clé recherché : 'DDR' - Totale: 28 (1/2) Pages
FabricantNo de pièceFiches techniqueDescription
Company Logo Img
Integrated Device Techn...
ICS9P935 Datasheet pdf image
197Kb/13P
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
9P935AFLF Datasheet pdf image
197Kb/13P
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
ICS93718 Datasheet pdf image
102Kb/9P
DDR and SDRAM Buffer
ICSSSTVF16857 Datasheet pdf image
939Kb/8P
DDR 14-BIT REGISTERED BUFFER
ICSSSTVA16857 Datasheet pdf image
83Kb/9P
DDR 14-Bit Registered Buffer
ICS951702 Datasheet pdf image
160Kb/12P
PIII??System Clock Chip for DDR SDRAM
6V49205B Datasheet pdf image
275Kb/16P
Freescale System Clock w/Selectable DDR Frequency
ICSSSTVA16859C Datasheet pdf image
293Kb/10P
DDR 13-Bit to 26-Bit Registered Buffer
ICSSSTVF16859B Datasheet pdf image
114Kb/10P
DDR 13-Bit to 26-Bit Registered Buffer
IDT71P71804 Datasheet pdf image
228Kb/23P
18Mb Pipelined DDR?줚I SRAM Burst of 2
IDT71P73204 Datasheet pdf image
635Kb/25P
18Mb Pipelined DDR?줚I SRAM Burst of 4
IDT71P79204 Datasheet pdf image
629Kb/23P
18Mb Pipelined DDR?줚I SIO SRAM Burst of 2
840NT4 Datasheet pdf image
611Kb/30P
System & DDR Clocks for Freescale B4/T4 Processor Systems
ICS9P936 Datasheet pdf image
194Kb/12P
Low Skew Dual Bank DDR I/II Fan-out Buffer
ADC1112D125 Datasheet pdf image
601Kb/39P
Dual 11-bit ADC; CMOS or LVDS DDR digital outputs
IDT72T4088 Datasheet pdf image
497Kb/52P
2.5 VOLT HIGH-SPEED TeraSync DDR/SDR FIFO 40-BIT CONFIGURATION
IDT72T2098 Datasheet pdf image
481Kb/51P
2.5 VOLT HIGH-SPEED TeraSync??DDR/SDR FIFO 20-BIT/10-BIT CONFIGURATION
ADC1115S125 Datasheet pdf image
373Kb/36P
Single 11-bit ADC; 125 Msps with input buffer; CMOS or LVDS DDR digital outputs
IDT72T54242 Datasheet pdf image
543Kb/56P
2.5V QUAD/DUAL TeraSync??DDR/SDR FIFO x10 QUAD FIFO or x10/x20 DUAL FIFO CONFIGURATIONS
ADC1010S Datasheet pdf image
386Kb/37P
Single 10-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs

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